A journey inside the lifecycle of an Integrated Circuit
If anything characterizes our days, is the invisible interconnection and the massive exchange of information and data. Telecommunications and information have marked a new era for humanity, one that was coming out of a violent beginning of the 20th century, but full of scientific discoveries that would mark the path for our current societies connected by the Internet and its infinite channels for information exchange. This constant flow of data allows us to see a world that is updated in real-time, every day, everywhere; on the tip of our fingers. This world of information has at its veins and arteries the devices we use every day (such as laptops, smartphones, tablets, monitors, etc.) and machines that enable this (servers, switches, routers, satellites, etc.).
Estimates of annual emissions from the ICT sector have varying ranges of estimates from source to source: some researchers account for 14% of GHG (1), others speak of 1.8 - 2.8%, up to 3.9% of global emissions for the whole ICT sector (2). ICT use and application projections are expected to continue to increase: the global market for semi-conductors increased from USD 340 billion in 2015 to USD 440 billion in 2019 and is predicted to reach USD 650 billion in 2025 (3), as well as the e-waste created annually by their disuse. To understand how this interconnected world populated by equipment and devices works, we have to analyze the lifecycle of its cornerstone: Integrated Circuits.
All ICT equipment begins its life on the drawing board, although this phase goes through an extensive testing process before production is considered. In the first phase, the system specifications are analyzed: 1. the functional requirements, 2. the system to be used by the processor, 3. the external interfaces (e.g. SLIC, SD Card, Internal SSD, External SDD, WIFI, HPAV2, etc.). The second step entails designing the architecture, afterward, we move on to a verification phase where a software version of the hardware system is crafted in C, C++, or SystemC.
After this hardware model is created a formal verification is performed: property checking system requirements are defined using property specification languages. After this, the Design Entry is created, which includes: IC Input and Output Pins, IP Block instantiations, design connectivity, clock, reset strategy, etc. A functional simulation of the design entry takes place and a subsequent formal verification for equivalence checking is done afterward. After all this testing the design goes through pre-silicon validation: verification of design in hardware before sending it to manufacturing, it validates high-risk o newly developed IPs and saves costs on re-spinning ICs via an emulator or FPGA. After this a phase of synthesis takes place, then an STA (Statistical Timing Analysis) and a DFT (Design For Test) are created. This DFT goes through a pre-layout simulation and a Physical layout is created, which subsequently goes to a post-layout simulation. All of these steps comprise the design of an Integrated Circuit.
Now ready for production we move from the designers to the fabric (usually called fab). Manufacturers follow strict rules to ensure the conditions needed to create the Integrated Circuits. The designers send a GDSII file to the foundry, also called the tapeout. The first step is to create the raw material that entitles the wafer: sheets of purified silicon. After this, the wafer is cut and the layering starts. Via lithography (exposure to UV rays) and masking, the circuits are carved and created on the wafer. Once the layering is completed the Wafer is cut into the individual ICs and tested providing an input stimulus to the IC and verifying the output, also verifying the electrical and thermal characteristics of the Integrated Circuit and finding the ideal operating conditions. This test permits to filter of defective Integrated Circuits early on. After this, a real-world environment conditions test is conducted (Post-Silicon Validation). If the IC in question surpasses this test, its package and distributed to the corresponding client.